任意激励波形的涡流检测系统设计
Design of Eddy Current Testing System with Arbitrary Excitement Waveform
摘 要
为适应当前涡流检测的发展，设计了可激励任意波形的涡流检测系统。采用基于大容量同步动态随机存储器(SDRAM)任意波形表的直接数字合成技术，由CPU根据检测需求生成任意波形幅值表，存储到SDRAM中，现场可编程门阵列器件(FPGA)将波形数据输出到D/A转换器，经滤波、放大后驱动涡流探头。该方法较好地解决了由于受资源限制而在使用直接数字合成输出波形时所进行的各种复杂计算。试验结果表明，任意激励波形的涡流检测系统性能稳定、使用灵活，可以满足高性能涡流检测的需求。
任意波形
直接数字合成
激励方式
Eddy current testing
Arbitrary waveform
Direct digital synthesis
Stimulate Way
Abstract
A new excitement source of eddy current testing was presented to use an arbitrary waveform as the development of the eddy current testing. A direct digital synthesis(DDS) technology, based on large capacity synchronous dynamic random access memory(SDRAM), was used, in which the table of arbitrary waveform amplitude generated by CPU according to testing requirement was stored, and FPGA outputs the amplitudes to D/A converter. The output, after being filtered using low pass filter and power amplification, drived the eddy current probe. It was showed that the new method was able to resolve various complicated computations when the resources were limited so as to use DDS, and the presented arbitrary waveform excitement system that was stable and flexible could satisfy eddy current testing requirements at present and in the near future.
中图分类号 TG115.28 TJ81+0.36
所属栏目 科研成果与学术交流
基金项目 广东省重点攻关资助项目(2004A11303001，2006B12401001)
收稿日期 2007/1/18
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网络出版日期
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备注谢宝忠(1977-)，男，博士研究生，主要从事无损检测技术及仪器方面的研究工作。
引用该论文: XIE Bao-zhong,CHEN Tie-qun,LIN Jun-ming,LIU Gui-xiong. Design of Eddy Current Testing System with Arbitrary Excitement Waveform[J]. Nondestructive Testing, 2007, 29(4): 173～176
谢宝忠,陈铁群,林俊明,刘桂雄. 任意激励波形的涡流检测系统设计[J]. 无损检测, 2007, 29(4): 173～176
被引情况:
【1】任吉林,赵磊,唐继红,俞佳,廖甜甜, "一种基于DDS技术的脉冲涡流信号源的实现",无损检测 31, 643-646(2009)
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参考文献
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【9】Chang Yong Kang, Earl E, Swartzlander Jr. Digit-pipelined direct digital frequency synthesis based on differential CORDIC[J]. IEEE Transactions on Circuits and Systems-Ⅰ: Regular Papers,2006,53(5):1035-1044.
【10】Chih-Hsiu Lin, An-Yeu Wu. Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications[J]. IEEE Transactions on Circuits and Systems-Ⅰ: Regular Papers,2005,52(11):2385-2396.
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【12】Lakshmi S Jyothi Chimakurthy, Malinky Ghosh, Fa Foster Dai. A novel DDS using nonlinear ROM addressing with improved compression ratio and quantization noise[J]. IEEE Transactions on Ultrasonics, Ferroelectronics, and Frequency Control,2006,53(2):274-283.
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【2】Yi-Da Wu, Chang-Ming Lai, Chin-Yuan Chou. An OPLL-DDS based frequency synthesizer for DCS-1800 receiver[C]. ISCAS 2006.2006:3061-3064.
【3】Foster Fa Dai, Charles Stroud, Da yu Yang. Automatic linearity and frequency response tests with built-in pattern generator and analyzer[J]. IEEE Transactions on Very Large Scale Integration(VLSI) Systems,2006,14(6):561-572.
【4】Orino Y, Kurosawa M K, Katagiri T. Direct-digital synthesis using delta-sigma modulated signals[C]. Circuits and Systems, 2005. ISCAS2005. IEEE International Symposium.2005:1706-1709.
【5】Richter R, Jentschel H-J. An analogue delay line for virtual clock enhancement in DDS[C]. Solid-State Circuits Conference, 2000. ESSCIRC'00. Proceedings of the 26th European.2000:476-479.
【6】Camilo Quintáns Graňa. Frequency accuracy improvement in the direct digital synthesis for the wave form generators[C]. IMTC 2006–Instrumentation and Measurement Technology Conference Sorrento. Italy:2006:1380-1385.
【7】Sheng Cheng J, Robert Jensen, Robert E Wallis. Further enhancements to the analysis of spectral purity in the application of practical direct digital synthesis[C]. 2004 IEEE International Ultrasonics, Ferroelectrics,and Frequency Control Joint 50th Anniversary Conference.2004:462-470.
【8】Garcia E O, Cumplido R, Arias M. Pipelined CORDIC design on FPGA for a digital sine and cosine waves generator. electrical and electronics engineering[C], 2006 3rd International Conference.2006:1-4.
【9】Chang Yong Kang, Earl E, Swartzlander Jr. Digit-pipelined direct digital frequency synthesis based on differential CORDIC[J]. IEEE Transactions on Circuits and Systems-Ⅰ: Regular Papers,2006,53(5):1035-1044.
【10】Chih-Hsiu Lin, An-Yeu Wu. Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications[J]. IEEE Transactions on Circuits and Systems-Ⅰ: Regular Papers,2005,52(11):2385-2396.
【11】Ghosh M, Chimakurthy L S J, Dai F F, et al. A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantization noise[C]. IEEE Int Symp Circuits Syst(ISCAS).2004:705-708.
【12】Lakshmi S Jyothi Chimakurthy, Malinky Ghosh, Fa Foster Dai. A novel DDS using nonlinear ROM addressing with improved compression ratio and quantization noise[J]. IEEE Transactions on Ultrasonics, Ferroelectronics, and Frequency Control,2006,53(2):274-283.
【13】Steve Winder. Analog and Digital Filter Design/Steve Winder-2nd ed[M]. USA: Newnes Espress,2002.
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